我们致力于创造充满活力的工作环境并激发员工更好实现自我价值

职位名称 职位类型 工作地点 操作
  • 球吧网直播手机版乒乓球直播测试工程师

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • 职位要求:
    1. 3年以上产品工程师或ATE工程师经验,精通stdf数据分析技巧和主流测试机测试理论(Advantest V93k, Teradyne Ultra Flex, J750等);
    2. 熟悉数据分析工具,了解主流的数据分析方法论,有JMP, Exensio的运用经验为佳
    3. 熟悉SOC球吧网直播手机版乒乓球直播开发流程和量产ramp up 流程。
    4. 有封装、质量和可靠性测试经验者优先。
    5. 对Fab 工艺, 封装工艺了解者优先
    6. 具备良好的外包供应商管理能力,解决问题的能力和进度管理能力;
    7. 良好的沟通能力和工作积极性。
    8. 本科及以上学历,电子工程、微电子、信息工程、通信或自动化等相关专业

  • 功能安全工程师

  • 软件系统岗位
  • 上海
  • 立即申请
  • Develop system level safety architecture and concepts to make SiEgngine’s product to be used in safety critical system. Build development process and setup environment as per ISO26262 and quality management requirement in engineering team. Draft and refine safety documents to follow ISO26262 to achieve ASIL from A to D. Develop and maintain safety related SW such as test libs, drivers to help customer on quickly develop safety products based on SiEgine’s chip. Work closely with product team ,SoC design team on safety mechanism co-design, implementation and review. Do validation on safety related features to meet diagnostics coverage as required in respective ASIL level.  


    Job Requirements
    - 2+ years of software development in automotive, embedded system or mobile.
    - Have strong interests in function safety to design, analyse and solve critical safety related issue.
    - Have validation and diagnostics design experience for at least one of following modules: power, clock, CPU core, Memory, Flash, BUS, Communication Channels etc.
    - Familiarity with Failure Modes and Effect Analysis (FMEA) and Fault Tree Analysis (FTA) , Dependent Failure Analysis(DFA), experience on using tools to perform FMEA, FTA,DFA is preferred .
    - Experiences on FSC and TSC, able to draft TSR, HSR and SSR and refine on TSR,HSR, SSR.
    - Understanding software project management on reviewing, testing and quality management tasks, experiences on ASPICE and MISRA C is preferred. 
    - Experiences on Safety Validation and FMEDA report is preferred.
    - Experiences on  safety mechanisms such as STL, MemTest, PeriTest, ECC, CRC,  LBIST/MBIST and etc.
    - Good to follow software development flow, version control and bug tracking with GIT, Jenkins, Bugzilla, or Jira

  • IC验证经理/主管

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • 带领验证团队,负责球吧网直播手机版乒乓球直播IP, SOC的验证工作(包括功能和时序仿真), 根据系统要求制定验证计划和方案, 负责球吧网直播手机版乒乓球直播验证的整体环境搭建和维护。 

    岗位职责:
    • 负责IP/子系统/系统级的全流程验证;
    • 根据设计规格制定验证计划及验证策略,根据设计及架构需求提取验证特性;
    • 搭建验证环境,创建并调试验证用例,收集并分析覆盖率,完成网表级仿真;
    • 开发或修改验证脚本,提高整体验证效率;
    • 业界新技术、新工具、新方法学的研究及开发;

    任职要求:
    • 掌握IP或SOC验证流程,对验证方法学有深刻的理解;
    • 精通System Verilog,UVM,精通Perl/Python/TCL等脚本语言,熟悉C/C++;
    • 有如下几项经验之中的一项或多项:
         (1) ARM CPU验证经验;
         (2) SOC总线验证经验;
         (3) DDR验证经验;
         (4) ISP/Codec等图像验证经验;
         (5) NPU等AI模块验证经验;
         (6) DSP等验证经验;
         (7) 带SDF的网表级仿真经验;
         (8) 搭建并维护过大型验证环境的经验;
    • 有前端设计或球吧网直播手机版乒乓球直播测试经验优先;
    • 具有责任感,良好的解决问题能力和沟通协调能力,勇于创新和接受挑战; 
    • 电子、计算机、通信、自动化等相关专业硕士及以上学历,7年以上工作经验。
  • 视觉AI(高级)算法工程师

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • 岗位职责:
    • 开发ISP和ADAS相关算法,并完成算法效果验证
    • 写算法文档,C模型,以及完成定点化
    • 与球吧网直播手机版乒乓球直播设计团队合作,将算法转化成球吧网直播手机版乒乓球直播设计
    • 与软件团队合作,将算法转化为软件应用

    任职要求: 
    • 精通 算法设计语言matlab,python,C/C++
    • 有AI、ISP、ADAS或者SLAM算法开发的经验  
    • 了解一些ADAS算法:车道线、车辆、行人检测和跟踪;了解点云处理算法;了解基本ADAS应用算法:LKA/LDW/AEB/ACC/APS/BSD/DMS等等
    • 了解图像信号类型和基本成像过程
    • 了解IC设计语言和流程可以加分
    • 了解SoC以及软硬件设计架构和流程可以加分
    • 了解光学可以加分
    • 具有责任感,良好的解决问题能力和沟通协调能力,勇于创新和接受挑战; 
    • 电子、计算机、通信、自动化等相关专业硕士及以上学历,2年以上工作经验。
  • ISP(高级)算法工程师

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • 岗位职责:
    • 开发ISP相关图像处理算法,并完成算法效果验证
    • 写算法文档,C模型,以及完成定点化
    • 与球吧网直播手机版乒乓球直播设计团队合作,将算法转化成球吧网直播手机版乒乓球直播设计
    • 与软件团队合作,将算法转化为软件应用

    任职要求: 
    • 精通 算法设计语言matlab,python,C/C++
    • 有图像处理算法开发的经验  
    • 了解一些图像处理算法:图像去噪、HDR、颜色合成、阴影矫正、畸变矫正、计算机视觉、图像增强等
    • 了解图像信号类型和基本成像过程
    • 了解IC设计语言和流程可以加分
    • 了解SoC以及软硬件设计架构和流程可以加分
    • 了解光学可以加分
    了解车载摄像头应用可以加分
    具有责任感,良好的解决问题能力和沟通协调能力,勇于创新和接受挑战; 
    电子、计算机、通信、自动化等相关专业硕士及以上学历,2年以上工作经验。
  • (高级)产品经理

  • 支持部门岗位
  • 上海
  • 立即申请
  • Description
    Support PMO to lead company product management functions. Assist product marketing to develop and implement product strategy. Monitor and analyze product development activity against goal. Responsibilities including:
    - Effectively manage all aspects of product development through product life cycle from business feasibility to mass production.
    - Coordinate with Product Marketing to collect market requirements from end-users and the competitive environment, synthesize these requirements into product plan.
    - Support Project Management to define project execution plans and then work with the product development team to ensure quality delivery according to the plan.
    - Working with cross functional R&D teams to solve engineering issues during new product development.
    - Support Business Development and sales for all necessary business related activities.
    - Support Project Management to define project execution plans and then work with the product development team to ensure quality delivery according to the plan.
    -Assist PMO to optimize new product development flow and continues improvement plan.

    Qualification:
    - Bachelor’s degree (or above) in Electrical Engineering with > 5 years related experience
    - Experience of Product Management or Product Marketing on SoC products
    - Understanding of ADAS/IVI SoC related product and market is strong plus
    - Experience of New Product Introduction or Project Management in IC industry preferred
    - Professional written and verbal communication and interpersonal skills. Ability to facilitate cross functional group meetings.
    - Team player with strong accountability.

  • ASIC设计工程师-PCIE

  • 球吧网直播手机版乒乓球直播设计岗位
  • 武汉
  • 立即申请
  • Job Description:   

    1. Work with SOC architecture team which has very large scale SOC experience from AMD/Intel/Marvell.

    2. SOC micro architecture design according to MRD; SOC micro architecture analysis, optimization and simulation.

    3. PCIE architecture design and system solution exploration.

    4. PCIE3.0/4.0/5.0 controller and phy micro architecture design and optimization.

    5. Chip interconnect design based on CXL or CCIX.

    6. Read and understand the third-party IP datasheet, finish the IP integration design and RTL coding.

    7. Perform RTL code quality check,CDC check,deliver the SDC & UPF file and support the IP/subsystem implementation.

    8. Perform RTL-to-Netlist implementation using in-house implementation flow.

    9. Function safety (Fusa) definition. Finish FSR, HSR, FMEA and FMEDA.

    10. Co-work with DFT team to finish the test related logic implementation based on the IP requirement and support the test pattern development/verification.

    11. Support the driver development of the software team, co-work with software team and system to finish the multimedia subsystem related system validation.


    Job Requirements: 


    1. Hand on experience of logic design.

    2. Be familiar with Frontend design & implementation flow,Such as:Lint,CDC check,logic synthesis,formal;Be familiar with related EDA tools.

    3. Familiar with scripts (tcl, perl, makefile etc.).

    4. Experience of PCIE3.0/4.0/5.0 protocal is a plus.

    5. Experience of PCIE controller or phy design is a plus.

    6. Experience of PCIE performance optimization is a plus.

    7. Experience of CXL or CCIX is a plus.

    8. Experience of clock/reset design is a plus.

    9. Experience of low power design is a plus; be familiar with DVFS and power gating.

    10. Experience of Fusa design is a plus.

    11. Teamwork, A high-level of self-motivation and a proactive approach to solving problems.

  • ASIC设计工程师-PCIE

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • Job Description:   

    1. Work with SOC architecture team which has very large scale SOC experience from AMD/Intel/Marvell.

    2. SOC micro architecture design according to MRD; SOC micro architecture analysis, optimization and simulation.

    3. PCIE architecture design and system solution exploration.

    4. PCIE3.0/4.0/5.0 controller and phy micro architecture design and optimization.

    5. Chip interconnect design based on CXL or CCIX.

    6. Read and understand the third-party IP datasheet, finish the IP integration design and RTL coding.

    7. Perform RTL code quality check,CDC check,deliver the SDC & UPF file and support the IP/subsystem implementation.

    8. Perform RTL-to-Netlist implementation using in-house implementation flow.

    9. Function safety (Fusa) definition. Finish FSR, HSR, FMEA and FMEDA.

    10. Co-work with DFT team to finish the test related logic implementation based on the IP requirement and support the test pattern development/verification.

    11. Support the driver development of the software team, co-work with software team and system to finish the multimedia subsystem related system validation.


    Job Requirements: 


    1. Hand on experience of logic design.

    2. Be familiar with Frontend design & implementation flow,Such as:Lint,CDC check,logic synthesis,formal;Be familiar with related EDA tools.

    3. Familiar with scripts (tcl, perl, makefile etc.).

    4. Experience of PCIE3.0/4.0/5.0 protocal is a plus.

    5. Experience of PCIE controller or phy design is a plus.

    6. Experience of PCIE performance optimization is a plus.

    7. Experience of CXL or CCIX is a plus.

    8. Experience of clock/reset design is a plus.

    9. Experience of low power design is a plus; be familiar with DVFS and power gating.

    10. Experience of Fusa design is a plus.

    11. Teamwork, A high-level of self-motivation and a proactive approach to solving problems.

  • ASIC设计工程师-PCIE

  • 球吧网直播手机版乒乓球直播设计岗位
  • 北京
  • 立即申请
  • Job Description:   

    1. Work with SOC architecture team which has very large scale SOC experience from AMD/Intel/Marvell.

    2. SOC micro architecture design according to MRD; SOC micro architecture analysis, optimization and simulation.

    3. PCIE architecture design and system solution exploration.

    4. PCIE3.0/4.0/5.0 controller and phy micro architecture design and optimization.

    5. Chip interconnect design based on CXL or CCIX.

    6. Read and understand the third-party IP datasheet, finish the IP integration design and RTL coding.

    7. Perform RTL code quality check,CDC checkdeliver the SDC & UPF file and support the IP/subsystem implementation.

    8. Perform RTL-to-Netlist implementation using in-house implementation flow.

    9. Function safety (Fusa) definition. Finish FSR, HSR, FMEA and FMEDA.

    10. Co-work with DFT team to finish the test related logic implementation based on the IP requirement and support the test pattern development/verification.

    11. Support the driver development of the software team, co-work with software team and system to finish the multimedia subsystem related system validation.


    Job Requirements: 


    1. Hand on experience of logic design.

    2. Be familiar with Frontend design & implementation flow,Such asLintCDC checklogic synthesisformalBe familiar with related EDA tools.

    3. Familiar with scripts (tcl, perl, makefile etc.).

    4. Experience of PCIE3.0/4.0/5.0 protocal is a plus.

    5. Experience of PCIE controller or phy design is a plus.

    6. Experience of PCIE performance optimization is a plus.

    7. Experience of CXL or CCIX is a plus.

    8. Experience of clock/reset design is a plus.

    9. Experience of low power design is a plus; be familiar with DVFS and power gating.

    10. Experience of Fusa design is a plus.

    11. Teamwork, A high-level of self-motivation and a proactive approach to solving problems.

  • ASIC设计工程师-NPU & AI

  • 球吧网直播手机版乒乓球直播设计岗位
  • 武汉
  • 立即申请
  • Job Description:   

    1. ADAS algorithm study and provide implement solution.

    2. NPU micro architecture design according to PRD;

    3. NPU micro architecture analysis, optimization and simulation.

    4. NPU performance/power simulation and optimization.

    5. NPU IP integration design and RTL coding;

    6. NPU clock/reset architecture design, clock jitter assessment for high speed interface.

    7. NPU low power architecture design.

    8. Perform RTL code quality check,CDC check,deliver the SDC & UPF file and support the IP/subsystem implementation;

    9. Perform RTL-to-Netlist implementation using in-house implementation flow;

    10. Function safety (Fusa) definition. Finish FSR, HSR, FMEA and FMEDA.

    11. Co-work with DFT team to finish the test related logic implementation based on the IP requirement and support the test pattern development/verification;

    12. Support the driver development of the software team, co-work with software team and system to finish the multimedia subsystem related system validation;


    Job Requirements: 

    1.  Hand on experience of logic design;

    2.   Be familiar with Frontend design & implementation flow,Such as:Lint,CDC check,logic synthesis,formal;Be familiar with related EDA tools;

    3.  Familiar with scripts (tcl, perl, makefile etc.)

    4.  Experience of NPU design is a plus;

    5.  Experience of ADAS algorithm is a plus;

    6.  Experience of NPU performance optimization is a plus;

    7.  Experience of clock/reset design is a plus;

    8.  Experience of low power design is a plus; be familiar with DVFS and power gating.

    9.  Experience of Fusa design is a plus;

    10. Teamwork, A high-level of self-motivation and a proactive approach to solving problems;

  • ASIC设计工程师-NPU & AI

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • Job Description:   

    1. ADAS algorithm study and provide implement solution.

    2. NPU micro architecture design according to PRD;

    3. NPU micro architecture analysis, optimization and simulation.

    4. NPU performance/power simulation and optimization.

    5. NPU IP integration design and RTL coding;

    6. NPU clock/reset architecture design, clock jitter assessment for high speed interface.

    7. NPU low power architecture design.

    8. Perform RTL code quality check,CDC check,deliver the SDC & UPF file and support the IP/subsystem implementation;

    9. Perform RTL-to-Netlist implementation using in-house implementation flow;

    10. Function safety (Fusa) definition. Finish FSR, HSR, FMEA and FMEDA.

    11. Co-work with DFT team to finish the test related logic implementation based on the IP requirement and support the test pattern development/verification;

    12. Support the driver development of the software team, co-work with software team and system to finish the multimedia subsystem related system validation;

    Job Requirements: 

    1.  Hand on experience of logic design;

    2.   Be familiar with Frontend design & implementation flow,Such as:Lint,CDC check,logic synthesis,formal;Be familiar with related EDA tools;

    3.  Familiar with scripts (tcl, perl, makefile etc.)

    4.  Experience of NPU design is a plus;

    5.  Experience of ADAS algorithm is a plus;

    6.  Experience of NPU performance optimization is a plus;

    7.  Experience of clock/reset design is a plus;

    8.  Experience of low power design is a plus; be familiar with DVFS and power gating.

    9.  Experience of Fusa design is a plus;

    10. Teamwork, A high-level of self-motivation and a proactive approach to solving problems;

  • ASIC设计工程师-NPU & AI

  • 球吧网直播手机版乒乓球直播设计岗位
  • 北京
  • 立即申请
  • Job Description:

    1. ADAS algorithm study andprovide implement solution.

    2. NPU micro architecture design according to PRD;

    3. NPU micro architecture analysis, optimization and simulation.

    4. NPU performance/power simulation and optimization.

    5. NPU IP integration design and RTL coding;

    6. NPU clock/reset architecture design, clock jitter assessment forhigh speed interface.

    7. NPU low power architecture design.

    8. Perform RTL code quality checkCDC checkdeliver the SDC & UPF file and support the IP/subsystemimplementation;

    9. Perform RTL-to-Netlist implementation using in-house implementationflow;

    10. Function safety (Fusa) definition. Finish FSR, HSR, FMEA and FMEDA.

    11. Co-work with DFT team to finish the test related logicimplementation based on the IP requirement and support the test patterndevelopment/verification

    12. Support the driver development of the software team, co-work withsoftware team and system to finish the multimedia subsystem related systemvalidation

    JobRequirements:

    1. Hand on experience of logicdesign

    2. Be familiar with Frontend design & implementation flowSuch asLintCDCchecklogic synthesisformalBe familiar with related EDA tools

    3. Familiar with scripts (tcl, perl, makefile etc.)

    4. Experience of NPU design is a plus

    5. Experience of ADAS algorithm is a plus;

    6. Experience of NPU performance optimization is a plus;

    7. Experience of clock/reset design is a plus;

    8. Experience of low power design is a plus; be familiar with DVFS andpower gating.

    9. Experience of Fusa design is a plus

    10. Teamwork, A high-level of self-motivation and a proactive approachto solving problems

  • SoC设计工程师-2022年应届毕业生招聘

  • 球吧网直播手机版乒乓球直播设计岗位
  • 武汉
  • 立即申请
  • 职位描述: 

    作为SOC设计团队的一员,你的职责包括但不限于

    1. 参与IP/子系统微架构以及SoC架构设计并完成相关文档编写

    2. 设计的RTL coding实现以及SoC集成设计工作

    3. 第三方IP的配置,优化

    4. 子系统的集成设计,包括第三方IP以及公司内部开发IP的集成

    5. 子系统的前端实现,包括综合,LINTCDC

    6. 帮助后端同事分析时序和后端实现方案

    7. 为球吧网直播手机版乒乓球直播Bring up提供支持,协助回片后的球吧网直播手机版乒乓球直播功能测试以及球吧网直播手机版乒乓球直播性能调优

     

    职位要求:

    1. 电子工程或计算机专业,硕士及以上学历

    2. 良好的C, Verilog, SystemVerilog经验

    3. 自我驱动,愿意分析和解决问题

  • SoC设计工程师-2022年应届毕业生招聘

  • 球吧网直播手机版乒乓球直播设计岗位
  • 上海
  • 立即申请
  • 职位描述: 

    作为SOC设计团队的一员,你的职责包括但不限于

    1. 参与IP/子系统微架构以及SoC架构设计并完成相关文档编写

    2. 设计的RTL coding实现以及SoC集成设计工作

    3. 第三方IP的配置,优化

    4. 子系统的集成设计,包括第三方IP以及公司内部开发IP的集成

    5. 子系统的前端实现,包括综合,LINTCDC

    6. 帮助后端同事分析时序和后端实现方案

    7. 为球吧网直播手机版乒乓球直播Bring up提供支持,协助回片后的球吧网直播手机版乒乓球直播功能测试以及球吧网直播手机版乒乓球直播性能调优

     

    职位要求:

    1. 电子工程或计算机专业,硕士及以上学历

    2. 良好的C, Verilog, SystemVerilog经验

    3. 自我驱动,愿意分析和解决问题

  • SoC设计工程师-2022年应届毕业生招聘

  • 球吧网直播手机版乒乓球直播设计岗位
  • 北京
  • 立即申请
  • 职位描述: 

    作为SOC设计团队的一员,你的职责包括但不限于

    1. 参与IP/子系统微架构以及SoC架构设计并完成相关文档编写

    2. 设计的RTL coding实现以及SoC集成设计工作

    3. 第三方IP的配置,优化

    4. 子系统的集成设计,包括第三方IP以及公司内部开发IP的集成

    5. 子系统的前端实现,包括综合,LINTCDC

    6. 帮助后端同事分析时序和后端实现方案

    7. 为球吧网直播手机版乒乓球直播Bring up提供支持,协助回片后的球吧网直播手机版乒乓球直播功能测试以及球吧网直播手机版乒乓球直播性能调优

     

    职位要求:

    1. 电子工程或计算机专业,硕士及以上学历

    2. 良好的C, Verilog, SystemVerilog经验

    3. 自我驱动,愿意分析和解决问题